DOE EES2 Pledge

Whereas,

for more than half a century following the invention of the transistor, semiconductor chip efficiency enjoyed the same biennial rate of doubling as the number of transistors on the chips and therefore modern microelectronics are more than a million times more energy efficient than their midcentury counterparts,
however, efficiency gains from planar miniaturization have been flagging since 2005. This trend, combined with the rise of energy-intensive applications such as artificial intelligence (AI), has spurred an urgent need for approaches beyond planar scaling to rapidly reduce microelectronics energy consumption.
therefore, to catalyze energy innovation, the U.S. Department of Energy (DOE) established Energy Efficiency Scaling for Two Decades (EES2). The goal of EES2 is to resume biennial energy efficiency doubling for microelectronics applications and realize a 1,000x improvement by 2040.
To achieve this EES2 goal, the sector must strive for microelectronics innovations that go beyond Moore’s Law, as well as improvements in enabling technologies such as power and control electronics.

Identify and publicize problems solved and opportunities unlocked by working toward the EES2 goal;
Participate in DOE-led R&D roadmapping and coordinate promising EES2-inspired, pre-competitive R&D projects among pledgers; and
Explore the formation of an externally-led EES2 alliance to lead future R&D roadmapping and accelerate the deployment of cost-effective technologies needed to achieve the EES2 goal.

There is no alternative to extreme reductions in energy consumption for maintaining technological leadership in critical emerging microelectronics applications such as high-performance computing, AI, and advanced communications;
EES2 is a key organizing principle that enables us to affordably and reliably meet new energy demands;
and
EES2 provides a technology leadership path that benefits the public by bolstering energy, economic, and national security.